BIB-VERSION:: CS-TR-v2.0
ID:: ncstrl.dartmouthcs//TR86-105
ENTRY:: January 20, 1995
ORGANIZATION:: Dartmouth College, Computer Science
TITLE:: Parallel Accessible Memory
TYPE:: Technical Report (paper)
REVISION:: 1
AUTHOR:: Nakamura, Shinji
NOTE:: The 'January' in DATE is an arbitrary placeholder.
DATE:: January 1986
RETRIEVAL:: For a paper copy, email <reports@cs.dartmouth.edu>
RETRIEVAL:: For a paper copy, write to
       Technical Report Librarian
       Department of Computer Science
       Dartmouth College
       6211 Sudikoff Laboratory
       Hanover, NH 03755-3510
       USA
RETRIEVAL:: PDF at http://www.cs.dartmouth.edu/reports/TR86-105.pdf
ABSTRACT::
	A new design of a memory device which allows simultaneous
access to more than one location is proposed.  The unique feature of
this multiple accessibility of the memory is realized by applying a
binomial concentrator, a type of sparse crossbar interconnection
network, to content-addressable memory.  The organization of the
memory system and the concentration network structure as well as the
network characteristics are described along with a distributive
control algorithm.  Applications of the memory system to parallel
processing environments are also included.
END:: ncstrl.dartmouthcs//TR86-105