%T Parallel Accessible Memory
%A Shinji Nakamura
%R Technical Report PCS-TR86-105
%I Dartmouth College, Computer Science
%C Hanover, NH
%D  1986
%U http://www.cs.dartmouth.edu/reports/TR86-105.pdf
%X
 	A new design of a memory device which allows simultaneous
 access to more than one location is proposed.  The unique feature of
 this multiple accessibility of the memory is realized by applying a
 binomial concentrator, a type of sparse crossbar interconnection
 network, to content-addressable memory.  The organization of the
 memory system and the concentration network structure as well as the
 network characteristics are described along with a distributive
 control algorithm.  Applications of the memory system to parallel
 processing environments are also included.