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www.cs.dartmouth.edu/~sws/abstracts/spwa99.shtml Last modified: 08/27/03 11:56:54 AM

S.W. Smith, R. Perez, S.H. Weingart, V. Austel.
``Validating a High-Performance, Programmable Secure Coprocessor.''
22nd National Information Systems Security Conference. October 1999.

Abstract

Over the last several years, our group designed and built a physically secure PCI card (the IBM 4758 [5]) containing a general-purpose processor with crypto support. However, for this device to function as a trusted platform for secure coprocessor applications, we needed to establish that assurance through independent validation. We chose FIPS 140-1, since discussions of secure hardware usually cite that standard, and Level 4, since the weaker levels did not provide sufficient assurance for many proposed applications.

Successful validation at Level 4 required withstanding a fairly open-ended suite of physical attacks, and preparing formal modeling and verification of the internal software---as well as meeting a number of other sizable challenges that were not initially apparent. In some sense, our validation effortwas an experiment to quantify the design and work effort necessary to achieve this previously unachieved security assurance level. Since our device is a programmable platform, we hope this work substantially lowers the barrier for others to develop, deploy, and validate secure coprocessor applications.

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