BibTeX for a paper by David Kotz at Dartmouth College.
For more information about this paper, visit this web page:
https://www.cs.dartmouth.edu/~kotz/research/abdollahi-caec/index.html

@InProceedings{abdollahi:caec,
  author =        {Sina Abdollahi and Amir {Al Sadi} and Marios Kogias and David Kotz and Hamed Haddadi},
  title =         {{CAEC: Confidential, Attestable, and Efficient Inter-CVM Communication with Arm CCA}},
  booktitle =     {{Proceedings of the IEEE European Symposium on Security and Privacy (Euro S\&P)}},
  year =          2026,
  month =         {July},
  publisher =     {IEEE},
  copyright =     {the authors},
  URL =           {https://www.cs.dartmouth.edu/~kotz/research/abdollahi-caec/index.html},
  note =          {Accepted for publication},
  abstract =      {Confidential Virtual Machines (CVMs) are increasingly adopted to protect sensitive workloads from privileged adversaries such as the hypervisor. While they provide strong isolation guarantees, existing CVM architectures lack first-class mechanisms for inter-CVM data sharing due to their disjoint memory model, making inter-CVM data exchange a performance bottleneck in compartmentalized or collaborative multi-CVM systems. Under this model, a CVM's accessible memory is either shared with the hypervisor or protected from both the hypervisor and all other CVMs. This design simplifies reasoning about memory ownership; however, it fundamentally precludes plaintext data sharing between CVMs because all inter-CVM communication must pass through hypervisor-accessible memory, requiring costly encryption and decryption to preserve confidentiality and integrity.\par  In this paper, we introduce CAEC, a system that enables protected memory sharing between CVMs. CAEC builds on Arm Confidential Compute Architecture (CCA) and extends its firmware to support Confidential Shared Memory (CSM), a memory region securely shared between multiple CVMs while remaining inaccessible to the hypervisor and all non-participating CVMs. CAEC design is fully compatible with CCA hardware and introduces only a modest increase (4\%) in CCA firmware code size. CAEC delivers substantial performance benefits across a range of workloads. For instance, Inter-CVM communication over CAEC achieves up to 209x reduction in CPU cycles compared to encryption-based mechanisms over hypervisor-accessible shared memory. By combining high performance, strong isolation guarantees, and attestable sharing semantics, CAEC provides a practical and scalable foundation for the next generation of trusted multi-CVM services across both edge and cloud environments.},
}